SHARC: An efficient metric for selective protection of software against soft errors
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http://hdl.handle.net/10045/81569
Títol: | SHARC: An efficient metric for selective protection of software against soft errors |
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Autors: | Isaza-González, José | Restrepo Calle, Felipe | Martínez-Álvarez, Antonio | Cuenca-Asensi, Sergio |
Grups d'investigació o GITE: | UniCAD: Grupo de investigación en CAD/CAM/CAE de la Universidad de Alicante |
Centre, Departament o Servei: | Universidad de Alicante. Departamento de Tecnología Informática y Computación |
Paraules clau: | Fault tolerance | Soft errors | SIHFT | Embedded systems |
Àrees de coneixement: | Arquitectura y Tecnología de Computadores |
Data de publicació: | de setembre-2018 |
Editor: | Elsevier |
Citació bibliogràfica: | Microelectronics Reliability. 2018, 88-90: 903-908. doi:10.1016/j.microrel.2018.07.008 |
Resum: | This paper presents a metric for the efficient application of selective hardening using software-based techniques against soft errors. It offers a method for selecting the resources to be protected obtaining maximum fault coverage with the minimum overhead. Common approaches are based on exhaustive exploration of the solution space or time-consuming fault injection campaigns. Contrarily, our Software based HARdening Criticality metric (SHARC) relies on early estimations of the impact that protection techniques will have on the global reliability of the application. SHARC estimations are based on features extracted from the dynamic analysis of source code and produce a prioritization of the resources involved accordingly. For assessing our approach two case studies were carried out using low-cost embedded microprocessors. Results were compared to traditional approaches like brute-force exploration and the Architectural Vulnerability Factor (AVF) metric. Experiments show that SHARC improves the results between 5% and 21% at a fraction of the effort. |
Patrocinadors: | This work was funded by the Spanish Ministry of Economy and Competitiveness and the European Regional Development Fund with the project Evaluación temprana de los efectos de radiación mediante simulación y virtualización. Estrategias de mitigación en arquitecturas de microprocesadores avanzados (Ref: ESP2015-68245-C4-3-P MINECO/FEDER, UE). |
URI: | http://hdl.handle.net/10045/81569 |
ISSN: | 0026-2714 (Print) | 1872-941X (Online) |
DOI: | 10.1016/j.microrel.2018.07.008 |
Idioma: | eng |
Tipus: | info:eu-repo/semantics/article |
Drets: | © 2018 Elsevier Ltd. |
Revisió científica: | si |
Versió de l'editor: | https://doi.org/10.1016/j.microrel.2018.07.008 |
Apareix a la col·lecció: | INV - UNICAD - Artículos de Revistas |
Arxius per aquest ítem:
Arxiu | Descripció | Tamany | Format | |
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2018_Isaza-Gonzalez_etal_MicroelectronicsReliability_final.pdf | Versión final (acceso restringido) | 272,27 kB | Adobe PDF | Obrir Sol·licitar una còpia |
2018_Isaza-Gonzalez_etal_MicroelectronicsReliability_preprint.pdf | Preprint (acceso abierto) | 991,04 kB | Adobe PDF | Obrir Vista prèvia |
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