Application-Based Analysis of Register File Criticality for Reliability Assessment in Embedded Microprocessors
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Title: | Application-Based Analysis of Register File Criticality for Reliability Assessment in Embedded Microprocessors |
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Authors: | Restrepo Calle, Felipe | Cuenca-Asensi, Sergio | Martínez-Álvarez, Antonio | Chielle, Eduardo | Kastensmidt, Fernanda L. |
Research Group/s: | UniCAD: Grupo de investigación en CAD/CAM/CAE de la Universidad de Alicante |
Center, Department or Service: | Universidad de Alicante. Departamento de Tecnología Informática y Computación |
Keywords: | Embedded systems | Metrics | Microprocessors | Reliability |
Knowledge Area: | Arquitectura y Tecnología de Computadores |
Issue Date: | Apr-2015 |
Publisher: | Springer Science+Business Media New York |
Citation: | Journal of Electronic Testing. 2015, 31(2): 139-150. doi:10.1007/s10836-015-5513-9 |
Abstract: | There is an increasing concern to reduce the cost and overheads during the development of reliable systems. Selective protection of most critical parts of the systems represents a viable solution to obtain a high level of reliability at a fraction of the cost. In particular to design a selective fault mitigation strategy for processor-based systems, it is mandatory to identify and prioritize the most vulnerable registers in the register file as best candidates to be protected (hardened). This paper presents an application-based metric to estimate the criticality of each register from the microprocessor register file in microprocessor-based systems. The proposed metric relies on the combination of three different criteria based on common features of executed applications. The applicability and accuracy of our proposal have been evaluated in a set of applications running in different microprocessors. Results show a significant improvement in accuracy compared to previous approaches and regardless of the underlying architecture. |
Sponsor: | This work was funded in part by the Spanish Ministry of Education, Culture and Sports with the project “Developing hybrid fault tolerance techniques for embedded microprocessors” (PHB2012-0158-PC). |
URI: | http://hdl.handle.net/10045/58375 |
ISSN: | 0923-8174 (Print) | 1573-0727 (Online) |
DOI: | 10.1007/s10836-015-5513-9 |
Language: | eng |
Type: | info:eu-repo/semantics/article |
Rights: | © Springer Science+Business Media New York 2015. The final publication is available at Springer via http://dx.doi.org/10.1007/s10836-015-5513-9 |
Peer Review: | si |
Publisher version: | http://dx.doi.org/10.1007/s10836-015-5513-9 |
Appears in Collections: | INV - UNICAD - Artículos de Revistas |
Files in This Item:
File | Description | Size | Format | |
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2015_Restrepo_etal_JElectronTest_final.pdf | Versión final (acceso restringido) | 620,55 kB | Adobe PDF | Open Request a copy |
2015_Restrepo_etal_JElectronTest_rev.pdf | Versión revisada (acceso abierto) | 1,35 MB | Adobe PDF | Open Preview |
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