Fault tolerant embedded systems design by multi-objective optimization

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Title: Fault tolerant embedded systems design by multi-objective optimization
Authors: Martínez-Álvarez, Antonio | Restrepo Calle, Felipe | Vivas Tejuelo, Luis Alberto | Cuenca-Asensi, Sergio
Research Group/s: UniCAD: Grupo de investigación en CAD/CAM/CAE de la Universidad de Alicante
Center, Department or Service: Universidad de Alicante. Departamento de Tecnología Informática y Computación
Keywords: Multi-objective optimization | NSGA-II | Embedded systems design | Soft error | Fault tolerance
Knowledge Area: Arquitectura y Tecnología de Computadores
Issue Date: 1-Dec-2013
Publisher: Elsevier
Citation: Expert Systems with Applications. 2013, 40(17): 6813-6822. doi:10.1016/j.eswa.2013.06.060
Abstract: The design of fault tolerant systems is gaining importance in large domains of embedded applications where design constrains are as important as reliability. New software techniques, based on selective application of redundancy, have shown remarkable fault coverage with reduced costs and overheads. However, the large number of different solutions provided by these techniques, and the costly process to assess their reliability, make the design space exploration a very difficult and time-consuming task. This paper proposes the integration of a multi-objective optimization tool with a software hardening environment to perform an automatic design space exploration in the search for the best trade-offs between reliability, cost, and performance. The first tool is commanded by a genetic algorithm which can simultaneously fulfill many design goals thanks to the use of the NSGA-II multi-objective algorithm. The second is a compiler-based infrastructure that automatically produces selective protected (hardened) versions of the software and generates accurate overhead reports and fault coverage estimations. The advantages of our proposal are illustrated by means of a complex and detailed case study involving a typical embedded application, the AES (Advanced Encryption Standard).
Sponsor: This work has been funded by the 2010 Research National Plan in Spain of the Ministry of Science and Innovation with the project ‘Integral Analysis of Digital Circuits and Systems for Aerospace Applications (RENASER+) (TEC2010-22095-C03-01).
URI: http://hdl.handle.net/10045/40365
ISSN: 0957-4174 (Print) | 1873-6793 (Online)
DOI: 10.1016/j.eswa.2013.06.060
Language: eng
Type: info:eu-repo/semantics/article
Peer Review: si
Publisher version: http://dx.doi.org/10.1016/j.eswa.2013.06.060
Appears in Collections:INV - UNICAD - Artículos de Revistas

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