Rapid prototyping of radiation-tolerant embedded systems on FPGA
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http://hdl.handle.net/10045/14923
Títol: | Rapid prototyping of radiation-tolerant embedded systems on FPGA |
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Autors: | Restrepo Calle, Felipe | Martínez-Álvarez, Antonio | Palomo Pinto, Francisco Rogelio | Guzmán Miranda, Hipólito | Aguirre Echanove, Miguel Ángel | Cuenca-Asensi, Sergio |
Grups d'investigació o GITE: | UniCAD: Grupo de investigación en CAD/CAM/CAE de la Universidad de Alicante |
Centre, Departament o Servei: | Universidad de Alicante. Departamento de Tecnología Informática y Computación | Universidad de Sevilla. Departamento de Ingeniería Electrónica |
Paraules clau: | FPGA | Radiation effects | Embedded systems |
Àrees de coneixement: | Ciencia de la Computación e Inteligencia Artificial | Electrónica |
Data de creació: | de març-2010 |
Data de publicació: | 1-de setembre-2010 |
Editor: | IEEE |
Citació bibliogràfica: | RESTREPO CALLE, Felipe, et al. "Rapid prototyping of radiation-tolerant embedded systems on FPGA". En: Proceedings of the 2010 International Conference on Field Programmable Logic and Applications : Milano, Italy, Aug. 31st - Sep. 2nd, 2010. Piscataway, N.J. : IEEE, 2010. ISBN 978-0-7695-4179-2, pp. 326-331 |
Resum: | Technological advances of Field Programmable Gate Array (FPGA) are making that this technology becomes the most preferred platform for the rapid prototyping of highly integrated digital systems. In addition, protection of processor-based systems to mitigate the harmful effects of radiation-induced upset events is gaining importance while technology shrinks. In this context, the main contribution of this work is a novel rapid prototyping approach for the codesign of dependable embedded systems using FPGA. This is supported by a hardening platform that allows combining software-only fault-tolerance techniques with hardware-only approaches, representing several trade-offs among design constraints, reliability and cost. As case study, several radiation-tolerant embedded systems have been developed based on a technology-independent version of the Picoblaze processor. |
Patrocinadors: | This work was funded by the Ministry of Science and Education in Spain with the RENASER project (ESP2007-65914-C03-03) and the Generalitat Valenciana in Spain with the research project ’Aceleración de algoritmos industriales y de seguridad en entornos críticos mediante hardware’ (GV/2009/098). |
URI: | http://hdl.handle.net/10045/14923 |
ISBN: | 978-0-7695-4179-2 |
DOI: | 10.1109/FPL.2010.71 |
Idioma: | eng |
Tipus: | info:eu-repo/semantics/conferenceObject |
Drets: | © Copyright 2010 IEEE |
Revisió científica: | si |
Versió de l'editor: | http://dx.doi.org/10.1109/FPL.2010.71 |
Apareix a la col·lecció: | INV - UNICAD - Comunicaciones a Congresos, Conferencias, etc. |
Arxius per aquest ítem:
Arxiu | Descripció | Tamany | Format | |
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FPL2010_v20100901_publicado.pdf | 657,7 kB | Adobe PDF | Obrir Vista prèvia | |
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